The present invention relates to a reflection type liquid crystal display (LCD) device, and more particularly to an LCD device provided with a miniaturized reflection panel having a good reflectivity and a controllability, so as to be preferably applied to an image projector.
A conventional LCD panel generally uses a TFT (Thin Film Transistor) as a switching element for each pixel. Although the TFT is advantageous in manufacturing a large sized LCD panel and in decreasing the manufacturing cost thereof, the driving capacity thereof is liable to be small. Moreover as shown in FIG. 9, there occurs a parasitic capacitance C.sub.SD between the source and the drain of the transistor, thereby causing the fluctuation of the driving voltage applied to the corresponding pixel even after the transistor is turned off.
Hence in a field where the miniaturizing of the LCD panel is emphasized rather than the enlargement thereof, MOS transistors have come to be used as the switching elements. Moreover, reflection panels are employed in order to obtain a higher aperture rate.
In order to obtain desired switching characteristics for appropriately driving each pixel in miniaturized LCD panel, which is employed in an image projector for example, it is necessary for each MOS transistor to have an area approximate to that of the pixel electrode. When the transistors are formed on the same plane as the pixel electrodes, thereby defining the region of the electrodes, the aperture rate is too small for obtaining the desired efficiency. Thus, the pixel electrodes are disposed above the transistors, thereby forming a display panel of a layered construction. However, in the layered construction, the pixel electrode must be formed over various elements such as the transistors and the wirings. Hence the pixel electrodes cannot be disposed horizontally and the surfaces thereof become bumpy. Hence, the reflecting surface of the panel becomes uneven, thereby resulting in the deterioration of the reflecting characteristics such as the reflectance and the polarization controllability.
Japanese Patent Application Laid-Open 4-56827 discloses a conventional reflection LCD panel, as shown in section in FIG. 10, which aims to solve the problem. Referring to the figure, the display panel comprises a silicon substrate 1, opposite glass substrates 6, and a liquid crystal layer 9 sealed between the substrates 1 and 6. On the silicon substrate 1, MOSFETs 2 are provided in a matrix, and pixel electrodes 4 are provided also on the substrate 1 in a matrix, interposing an insulation layer 3. A protection layer 5 is further provided on the MOSFETs 2 and the electrodes 4. On the entire substrate 6, a transparent electrode 7 is provided on the side of the liquid crystal layer 9. On the transparent electrode 7, a black matrix or black stripes 9b are formed at portions confronting the MOSFETs 2. The pixel electrodes 4 are provided only at the areas above storage capacitor electrodes 4a so that the upper surface of the pixel electrode 4 becomes flat.
The above described display panel is advantageous in that the pixel electrodes 4 are formed only in areas where the layer under the pixel electrodes 4 is flat and evenly disposed. Hence, the reflecting surface becomes flat, thereby improving the reflecting characteristics. However, only a portion of the reflecting surface can be made flat so that the black matrix 9b must be provided on the glass substrate 6 at the portions which oppose the transistors 2 and other wirings formed on the silicon substrate 1. Thus the aperture rate of the panel is decreased. Moreover, a complicated and difficult positioning procedure is necessary when assembling the silicon and glass substrates.
Japanese Patent Application Laid-Open 6-148679 discloses another conventional reflection LCD panel wherein the pixel electrodes and the protection layer are ground to flatten the reflecting surface.
More particularly, referring to FIG. 11a, the MOSFETs 2a provided in the form of a matrix are disposed on the silicon substrate 1a. The pixel electrodes 4b are also formed on the substrate 1a in a matrix through the insulation layer 3a. The protection layer 5a covers the pixel electrodes 4b. The surfaces of the electrodes 4b and the protection layer 5a are ground so that the reflecting surface becomes flat.
In order to form an even and flat reflecting surface, the pixel electrodes must initially have a thickness much larger than that of the ordinary electrodes, thereby taking more time to laminate the material. Moreover, the electrode must be ground until the surface thereof is even. Although such a display panel can be experimentally produced, due to the increase of the processing cost, it is not preferable in actual production. In addition, the panel has portions where conductive patterns dominate and portions comprising between-layer films in which conductive patterns are disposed, isolated from one another. These portions have different finish when ground so that it is difficult to render the entire surface flat.
The display panel has further disadvantages.
When the MOSFET 2a is rendered conductive, driving voltage is quickly applied to the molecules in the liquid crystal layer 9a through the pixel electrode 4b. When the MOSFET 2a becomes inconductive, the load and the applied voltage are held at a storage capacitor electrode, so that the polarization of the liquid crystal can be controlled.
Referring to FIG. 11b showing an equivalent circuit of the display panel, there are generated a parasitic capacitance C.sub.NG between the gate G and the drain D of the MOSFET 2a, and a parasitic resistance R.sub.ND between the drain D of the MOSFET 2a and the silicon substrate 1a which is connected to other elements such as a backgate. When the source S of the MOSFET 2a is applied with a data signal through an electrode A.sub.2, the liquid crystal layer 9a is applied with the driving voltage. A part of the voltage of a signal applied to the gate G through an electrode Y.sub.2 is added to the driving voltage through the parasitic capacitance C.sub.NG. Thus the driving voltage is fluctuated. Furthermore, the electric current may leak from the pixel electrode 4a through the parasitic resistance R.sub.ND even when the MOSFET 2a is turned off. This also causes the fluctuation of the driving voltage. In addition, the voltage between the source S and the silicon substrate 1a fluctuates in accordance with the data signal, thereby decreasing the dynamic range of the MOSFET.
It is hence necessary to eliminate the undesirable influences of the parasitic capacitance and parasitic resistance. From the point of the manufacturing technique and the manufacturing cost, the means for eliminating the influences is preferably compatible with the existing conventional manufacturing devices.
The conventional MOSFET provided in the above described display panels usually has the lightly doped drain-source (LDD) structure as shown in FIGS. 12a and 12b. In the MOSFET 2b, a silicon oxide film 2c is formed on either side of a gate electrode G. Silicon is implanted in the substrate so that there are formed a p.sup.+ drain region, namely, a highly doped region 2d wherein the density of the impurities is high, and a p.sup.- drain region, namely, a lightly doped region 2e adjacent the highly doped region 2d where the density of the impurities is low under the silicon oxide film 2c. Since the highly doped region 2d is disposed between the gate and the drain, the maximum intensity of the electric field adjacent the drain is decreased. Accordingly, it is possible to miniaturize the MOSFET which becomes conductive when applied with the voltage of about 5 volts, which is the level of the supply voltage of the ICs in general. Namely, the MOSFET with the channel length of about 1.2 .mu.m can be manufactured.
The driving voltage needed to control the polarization of the liquid crystal molecules is generally between 15 and 20 volts. In order that the MOSFET for switching on and off the driving voltage has a sufficient withstand voltage, that is, the maximum voltage which the MOSFET is able to sustain without breaking down, the lightly doped region 2e must have a length of about 1.5 to 2 .mu.m taking into account the possibility that twice as much voltage may happen to be fed. However, in the LDD structure, since the thickness of the silicon oxide film 2c must be considered, the lightly doped region 2e can only be formed with a length of about 0.2 to 0.3 .mu.m, namely decreasing the withstand voltage. Hence, although the MOSFET can be made smaller, the operational reliability is decreased.
FIGS. 13a and 13b show another conventional structure of the MOSFET disclosed in Japanese Patent Application Laid-Open 5-93922. Such a structure is called the drift channel structure, and is intended to solve the above mentioned problem by decreasing the intensity of the electric field adjacent the drain D.
As shown in FIG. 13b, a field oxidation film 3a is formed as a mask on the substrate. When ions are implanted, the lightly doped region 2e is formed adjacent the highly doped region 2d under the field oxidation film 3a. The lightly doped region 2e thus formed between the gate and the drain has a long length so that a withstand voltage larger than the liquid crystal driving voltage is obtained.
On the other hand, in the case of a miniaturized MOSFET having a channel length of about 1.2 .mu.m, the minimum width of the field oxidation film inevitably becomes about 2.4 .mu.m which is approximately the double of the channel length. The length of the lightly doped region 2e is accordingly increased to more than 2.4 .mu.m which is larger than the above described optimum length of 1.5 to 2.0 .mu.m. Hence, although a large withstand voltage of the MOSFET is obtained, a sufficient miniaturization thereof cannot be realized in the drift channel structure.